
32
FN4343.5
August 20, 2009
For proper operation, power supply decoupling is required. It
should be done using a 0.1
μF ceramic capacitor in parallel
with a 0.01
μF chip capacitor for each group of V
AA pins to
ground. These capacitors should be located as close to the
VAA and GND pins as possible, using short, wide traces.
If a separate linear regulator is used to provide power to the
HMP8154/HMP8156A power plane, the power-up sequence
should be designed to ensure latchup will not occur. A separate
linear regulator is recommended if the power supply noise on
the VAA pins exceeds 200mV. About 10% of the noise (that is
less than 1MHz) on the VAA pins will couple onto the analog
outputs.
External Reference Voltage
If an external reference voltage is used, its circuitry should
receive power from the same plane as the HMP8154/
HMP8156A. The external VREF must also be stable and well
decoupled from the power plane. An example VREF circuit
using a band gap reference diode is shown in Figure
37.
FIGURE 36A. VCC AND VAA PLANES
FIGURE 36B. COMMON GROUND PLANE
FIGURE 36. EXAMPLE POWER AND GROUND PLANES
LP
VCC
VAA
FERRITE
BEAD
BULK AREA
CAPACITOR
8154/8156A
PCB
ANALOG
FILTERS
CONN.
LP
GND
8154/8156A
PCB
ANALOG
FILTERS
CONN.
HMP8154, HMP8156A